Silicon Labs /BGM220PC22HNA /CRYPTOACC_S_RNGCTRL /CLKDIV

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Interpret as CLKDIV

31282724232019161512118743000000000000000000000000000000000000000000VALUE

Description

Sample clock divider. The frequency at which the outputs of the rings are sampled is given by Fs = Fpclk/(ClkDiv + 1)

Fields

VALUE

Sample clock divider

Links

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